Signed Binary, Addition, Subtraction and Shifts

Representing Negative Numbers in Binary

Unsigned binary can only store positive values. To represent negative integers, computers use a sign and magnitude scheme or, more commonly, two’s complement. Understanding both is required for your exam.

Sign and Magnitude

In sign and magnitude, the most significant bit (MSB — the leftmost bit) is reserved as a sign bit: 0 means positive, 1 means negative. The remaining bits hold the number’s size (magnitude) in ordinary binary.

For an 8-bit system: 00000101 = +5, and 10000101 = −5. The sign bit flips but the magnitude bits are identical. This is intuitive, but it causes a problem: there are two representations of zero (00000000 = +0 and 10000000 = −0), which complicates arithmetic circuits.

Two’s Complement

Two’s complement is the method used by nearly all modern processors. It eliminates the double-zero problem and makes addition and subtraction use the same circuit.

To find the two’s complement of a number, follow two steps:

1. Invert all the bits (flip every 0 to 1 and every 1 to 0) — this gives the one’s complement.
2. Add 1 to the result.

Binary Addition

Binary addition follows the same column-by-column rules as denary, but the only digits are 0 and 1:

• 0 + 0 = 0
• 0 + 1 = 1
• 1 + 1 = 10 (write 0, carry 1)
• 1 + 1 + 1 (carry) = 11 (write 1, carry 1)

Example: 01001011 + 00110101. Working from right to left, carry as needed, gives 10000000 (128). Always check whether the result has caused an overflow.

Binary Subtraction via Two’s Complement

Rather than building a separate subtraction circuit, processors compute A − B by adding A + (two’s complement of B). This means subtraction becomes addition, which simplifies hardware enormously.

Overflow and Underflow

Overflow occurs when the result of an addition exceeds the maximum value the bit width can hold. In 8-bit unsigned binary the maximum is 255; in 8-bit two’s complement the maximum is 127. If the carry out of the MSB produces a result that wraps around to an incorrect sign, that is an overflow error. Underflow is the equivalent error in the negative direction.

Arithmetic and Logical Shifts

A shift moves all bits in a register left or right by a given number of positions. There are two types relevant to your exam:

• Arithmetic shift — preserves the sign bit. An arithmetic shift left multiplies by 2 (bits fall off the left end if they overflow). An arithmetic shift right divides by 2, and the sign bit is copied into the vacated MSB position to keep the sign correct.
• Logical shift — does not preserve the sign. A logical shift right always inserts 0s into the MSB. This is used for unsigned binary manipulation.

Why Two's Complement Wins

Modern CPUs almost universally represent signed integers using two’s complement rather than sign-and-magnitude, and the choice is not arbitrary. Two’s complement has one important advantage that simplifies the arithmetic logic unit: addition and subtraction use the same circuit for both positive and negative numbers. A processor adding −3 to +5 in two’s complement performs exactly the same binary addition it would for any pair of positive values, then discards any carry beyond the sign bit. With sign-and-magnitude, the hardware would need to decide which sign each operand carried before choosing add or subtract, almost doubling the complexity for no benefit.

There is also a uniqueness benefit. Sign-and-magnitude has two representations of zero — 0000 0000 and 1000 0000 — which means the hardware has to treat “minus zero” as equal to “plus zero” everywhere it compares values. Two’s complement has only one zero, removing an entire class of compare-against-zero bugs. These design pressures are why every mainstream CPU since the 1970s has used two’s complement for signed integer storage.